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Post date: 30/05/2013
The PSRAM memory controller Core supports major PSRAM vendors. The Core is designed to handle both synchronous burst mode and asynchronous mode using soft configuration. The flexibility of the...
Post date: 20/12/2012
The RTLery library FIFO collection now contains 2 new components, a gearbox FIFO for converting data stream of different rates and a multiple FIFO structure where several FIFOs are implemented using...
Post date: 04/12/2012
All RTLery components are now parameterized, so you can use them in multiple instantiations in your design.
Having fully parameterized component enables users to add the components to their...
Post date: 29/05/2012
RTLery Library, now contains clock domain crossing synchronizers. The most common asynchronous FIFO synchronizer, based on an embedded memory and Grey code encoding, can be used for passing data...
Post date: 22/12/2011
RTLery website is on the air offering chip design generic components useful for many devices and applications. We currently offer some of the basic components and will offer many more in the near...